Semiconductor components manufacturer datasheet archive. Or maybe you know us because we turned the semiconductor world upside down and created the fabless model. Kintex ultrascale fpga feature summary ku0251 ku035 ku040 ku060 ku085 ku095 ku115 system logic cells 318,150 444,343 530,250 725,550 1,088,325 1,176,000 1,451,100. All of the ultrascale devices supported in a particular package are pin compatible. The xilinx 100g ethernet subsystem provides highperformance interconnect technologies for communications equipment and flexibility in implementing emerging interface standards.
In addition to the xilinx kintex ultrascale xcku040 device, the kintex ultrascale development board features 1gb. Introducing clb resources, clock management resources mmcm and pll, global and regional clocking resources, m emory and dsp resources, and sourcesynchronous resources. With a range of highdensity and highbandwidth io, the xpedite2500 is ideal for usercustomizable, highbandwidth data processing applications. Build, debug, analyze and optimize embedded software for your zynq. Tps650864 configurable multirail pmu for xilinx mpsocs and. The xpedite2500 is a configurable, highperformance, conduction or aircooled xmc module based on the xilinx kintex ultrascale family of fpgas. Ultrascale architecture product overview xilinx digikey. This collection of xilinx ultrascale architecture training videos is designed to quickly familiarize you with the ultrascale architecture and how to use the new capabilities in the vivado design. As the industrys only highend fpga at the 20nm process node, this family is ideal for applications ranging from 400g networking to large. This product guide describes the function and operation of the xilinx ultrascale devices integrated 100g ethernet ip core, including how to design, customize, and implement it. Virtex ultrascale fpga breakout performance and capacity virtex ultrascale devices provide the greatest performance and integration at 20nm, including serial io bandwidth and logic capacity.
Bachmann 001060830 bachmann class 20 001060830 bachmann class 2251 collett goods. After configuration, data is retained even if vcco drops to 0v. It features two ucd90120as for flexible power up and power down sequencing as well as voltage monitoring, current monitoring, and voltage margining through the pmbus interface. Pod10 and pod12 dc input and output levels are shown in t able 9, table, and t able 14. Front io with 4x qsfpdd sockets, each supporting two 100gbe or eight 1025gbe interfaces.
Related links fpga boards selection guide fmc modules selection guide htg930. The 2le and 1li devices can operate at a vccint voltage at 0. The fia trains 01 conversion pack comes as a fully assembled set of wheels, axles, bushes and gears. Absolute maximum ratings1 symbol description min max units fpga logic vccint internal supply voltage. Xilinx ultrascale training designing with ultrascale. Kintex ultrascale fpga expanding priceperformanceperwatt for the midrange kintex ultrascale devices deliver asicclass systemlevel performance, clock management, and power management for nextgeneration priceperformanceperwatt. Chapter 1 transceiver and tool overview introduction to the ultrascale architecture the xilinx ultrascale architecture is the first asicclass architecture to enable multihundred gigabitpersecond levels of system performance with smart processing, while efficiently routing and processing data onchip. The parameters included are common to popular designs and typical applications. The claimed ultrascale plus to ultrascale compatibility doesnt work for the l speedgrades.
Ultrascale architecture serial transceivers include the proven onchip circuits required to provide optimal signal integrity in real world environments, at data rates up to 6. Mar 15, 2019 the kintex ultrascale architecture has improved communication, clocking, critical paths, and interconnect within its fabric to deliver tbs, asicclass systemlevel performance for the most demanding of applications requiring lowlatency, ultra highthroughput io, memory bandwidth, data flow, processing, and dsp. Preliminary product specification 3 for general connectivity, the ps includes. All standard packages are leadfree signified by an additional v in the package name. The kintex ultrascale architecture has improved communication, clocking, critical paths, and interconnect within its fabric to deliver tbs, asicclass systemlevel performance for the most demanding of applications requiring lowlatency, ultra highthroughput io, memory bandwidth, data flow, processing, and dsp.
In table 1, the specifications shown are for a reference clock of 312. Today xilinxs portfolio combines all programmable devices in the categories. The gty transceiver line rate in the f1924 footprint is package limited to 16. Functionality is extended with a qorvo 2x2 small cell rf frontend 1.
Relative to the effective logic utilization demonstrated in the competitions 20nm product portfolio. For full part number details, see the ordering information section in ds890, ultrascale architecture and product overview. Preliminary product specification 4 kintex ultrascale fpga feature summary table 2. Pmp9475 xilinx virtex ultrascale fpga power solution with. The pcs portion of the ip can be configured in caui10 10 lanes x 10. The zip file includes ascii package files in txt format and in csv format. Preliminary product specification 2 vbatt key memory battery backup supply. Features include pci express gen2 interface x4, external memory, high density io using a vita 57. Xpedite2500 xilinx kintex ultrascale fpgabased xmc module. This document contains preliminary information and is subject to change without notice.
Pmp9444 xilinx kintex ultrascale fpga power solution. Supported drive strengths of 2, 4, 6, or 8 ma in io banks. The pmp9475 12vinput reference design provides all the power supply rails necessary to power xilinxs virtex ultrascale family of fpgas in a compact, highly efficient design. With a range of highdensity and highbandwidth io, the xpedite2500 is ideal for usercustomizable. The htgz920 architecture allows easy and versatile functional expansion through one vita 57. Each voltage listed requires filtering as described in the ultrascale architecture pcb design user guide ug583. Semiconductor components manufacturer or maybe you know us because we turned the semiconductor world upside down and created the fabless model. For a list of supported memory interfaces and operating frequencies for ultrascale family fpgas go to the external memory interfaces section of the memory solutions page. Front io with 4x qsfpdd sockets, each supporting two. The same scalable architecture and tools from 20nm ultrascale fpgas integrated hbm gen2 up to 16gb inpackage hbm dram with 460gbs bandwidth assembled using proven, 3rd generation 3d ic technology ssi technology massive memory interface bandwidth ddr4 support of up to 2,666mbs support for serverclass dimms. The admpcie9v5 is a singleslot halflength, full height, pci express addin card featuring the powerful and efficient xilinx virtex ultrascale plus vu9p3 fpga. D c a n d a c s w i t c h i n g c h a r a c t e r i s t i.
Edn kintex ultrascale fpgas for space applications. D c a n d a c s w i t c h i n g c h a r a c t e r i s t i c s. Maximum achievable performance is device and package dependent. With over 3500 patents and more than 60 industry firsts, we continue to pioneer new programmable technology putting our customers first. Overview ds895 for further information on xq defensegrade part numbers, packages, and ordering information. These second generation devices expand the midrange by delivering increased throughput with reduced latency. This design uses several of tis pmbus pointofload voltage regulators for ease of designconfiguration and telemetry of critical rails. For more information on supported gth or gty transceiver terminations see the ultrascale architectu re gth transceiver user guide ug576 or ultrascale architecture gty transceiver user guide ug578. Maximum frequency of device do you want to know about the system clock frequency with which fpga will function, i. Express addin card featuring the powerful and efficient xilinx virtex ultrascale vu0952 fpga. All supply voltage and junction temperature specifications are representative of worstcase conditions. For the design of the power distribution system consult ultrascale architecture pcb design guide ug583. The 2le devices can operate at a vccint voltage at 0. Related links fpga boards selection guide fmc modules selection guide htgz920.
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